1
GATE CSE 2002
Subjective
+5
-0
A computer system uses $$32$$-bit virtual address, and $$32$$-bit physical address. The physical memory is byte addressable, and the page size is $$4$$ kbytes. It is decided to use two level page tables to translate from virtual address to physical address. Equal number of bits should be used for indexing first level and second level page table, and the size of each page table entry is $$4$$ bytes.

(a) Give a diagram showing how a virtual address would be translated to a physical address.

(b) What is the number of page table entries that can be contained in each page?

(c) How many bits are available for storing protection and other information in each page table entry?

2
GATE CSE 2002
MCQ (Single Correct Answer)
+2
-0.6
In the index allocation scheme of blocks to a file, the maximum possible size of the file depends on
A
The size of the blocks, and the size of the address of the blocks.
B
The number of blocks used for the index, and the size of the blocks.
C
The size of the blocks, the number of blocks used for the index, and the size of the address of the blocks.
D
None of the above.
3
GATE CSE 2002
MCQ (Single Correct Answer)
+1
-0.3
Which of the following scheduling algorithms is non-preemptive?
A
Round Robin
B
First-In First-Out
C
Multilevel Queue Scheduling
D
Multilevel Queue Scheduling with Feedback
4
GATE CSE 2002
Subjective
+2
-0
Draw the process state transition diagram of an $$OS$$ in which
(i) each process is in one of the five states: created, ready, running, blocked (i.e. sleep or wait), or terminated, and
(ii) only non-preemptive scheduling is used by the $$OS.$$ Label the transitions appropriately.
EXAM MAP
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12