## Marks 1

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A processor has $$40$$ distinct instructions and $$24$$ general purpose registers. A $$32$$-bit instruction word has an ...
GATE CSE 2016 Set 2
For computers based on three-address instruction formats, each address field can be used to specify which of the followi...
GATE CSE 2015 Set 1
A $$CPU$$ has $$24$$-bit instructions. A program starts at address $$300$$ (in decimal). Which one of the following is a...
GATE CSE 2006
Which of the following addressing modes are suitable for program relocation at run time? $$1.$$ Absolute addressing $$2... GATE CSE 2004 Which of the following is not a form of memory? GATE CSE 2002 In absolute addressing mode GATE CSE 2002 The most appropriate matching for the following pairs$$X:$$Indirect addressing$$Y:$$Immediate addressing$$Z:$$Au... GATE CSE 2000 ## Marks 2 More A processor has$$16$$integer registers$$\left( {R0,\,\,R1,\,\,..\,\,,\,\,R15} \right)$$) and$$64$$floating point re... GATE CSE 2018 Consider a processor with$$64$$registers and an instruction set of size twelve. Each instruction has five distinct fie... GATE CSE 2016 Set 2 Consider the following code sequence having five instructions$${I_1}$$to$${I_5}$$. Each of these instructions has the... GATE CSE 2015 Set 3 Consider a processor with byte-addressable memory. Assume that all registers, including Program Counter$$(PC)$$and Pro... GATE CSE 2015 Set 2 A machine has a$$32$$-bit architecture, with$$1$$-word long instructions. It has$$64$$registers, each of which is$$...
GATE CSE 2014 Set 1
Consider two processors ܲ$${P_1}$$ and $${P_2}$$ executing the same instruction set. Assume that under identical conditi...
GATE CSE 2014 Set 1
Consider a hypothetical processor with an instruction of type $$LW$$ $$R1, 20(R2),$$ which during execution reads a $$32... GATE CSE 2013 On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given t... GATE CSE 2011 Which of the following is/are true of the auto increment addressing mode?$$1.$$It is useful in creating self relocatin... GATE CSE 2008 Which of the following must be true for the$$RFE$$(Return From Exception) instruction on a general purpose processor? ... GATE CSE 2008 For all delayed conditional branch instructions, irrespective of whether the condition evaluate true or false, GATE CSE 2008 Consider the following program segment. Here R1, R2 and R3 are the general purpose registers. Assume that the content ... GATE CSE 2006 Consider the following program segment. Here R1, R2 and R3 are the general purpose registers. Assume that the content ... GATE CSE 2006 Consider the following program segment. Here R1, R2 and R3 are the general purpose registers. Assume that the content ... GATE CSE 2006 Consider a three word machine instruction$$ADDA\left[ {{R_0}} \right],\,@\,B$$The first operand (destination... GATE CSE 2005 Consider the following program segment for a hypothetical$$CPU$$having three user registers$$R1,R2, $$and$$R3.$$... GATE CSE 2004 Consider the following program segment for a hypothetical$$CPU$$having three user registers$$R1,R2, $$and$$R3.$$... GATE CSE 2004 Which is the most appropriate match for the items in the first column with the items in the second column?$$X. Indire...
GATE CSE 2001

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