GATE CSE 2012 | GATE CSE Year Wise Previous Years Questions

GATE CSE 2012

MCQ (Single Correct Answer)

-0.6

A computer has a $$256$$ $$K$$ Byte, $$4$$-way set associative, write back data cache with block size of $$32$$ Bytes. The processor sends $$32$$ bit addresses to the cache controller. Each cache tag director $$y$$ entry contains, in addition to address tag, $$2$$ valid bits. $$1$$ modified bit and $$1$$ replacement bit.

The size of the cache tag directory is

$$160$$ $$K$$ bits

$$136$$ $$K$$ bits

$$40$$ $$K$$ bits

$$32$$ $$K$$ bits

GATE CSE 2012

MCQ (Single Correct Answer)

-0.3

as an alternative to register allocation at compile time

for efficient access to function parameters and local variables

to handle certain kinds of hazards

as part of address translation

GATE CSE 2012

MCQ (Single Correct Answer)

-0.3

The decimal value $$0.5$$ in $$IEEE$$ single precision floating point representation has

fraction bits of $$00000…000000$$ and exponent value of $$0$$

fraction bits of $$00000…000000$$ and exponent value of $$−1$$

fraction bits of $$10000…000000$$ and exponent value of $$0$$

no exact representation

GATE CSE 2012

MCQ (Single Correct Answer)

-0.6

Let G be a weighted graph with edge weights greater than one and G' be the graph constructed by squaring the weights of edges in G. Let T and T' be the minimum spanning trees of G and G' respectively, with total weights t and t'. Which of the following statements is TRUE?

T' = T with total weight t' = t²

T' = T with total weight t' < t²

T' =! T but total weight t' = t²

None of these

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