1
GATE CSE 2012
MCQ (Single Correct Answer)
+1
-0.3
The amount of $$ROM$$ needed to implement a $$4$$ bit multiplier is
2
GATE CSE 2012
MCQ (Single Correct Answer)
+2
-0.6
A computer has a $$256$$ $$K$$ Byte, $$4$$-way set associative, write back data cache with block size of $$32$$ Bytes. The processor sends $$32$$ bit addresses to the cache controller. Each cache tag director $$y$$ entry contains, in addition to address tag, $$2$$ valid bits. $$1$$ modified bit and $$1$$ replacement bit.
The number of bit in the tag field of an address is
3
GATE CSE 2012
MCQ (Single Correct Answer)
+2
-0.6
A computer has a $$256$$ $$K$$ Byte, $$4$$-way set associative, write back data cache with block size of $$32$$ Bytes. The processor sends $$32$$ bit addresses to the cache controller. Each cache tag director $$y$$ entry contains, in addition to address tag, $$2$$ valid bits. $$1$$ modified bit and $$1$$ replacement bit.
The size of the cache tag directory is
4
GATE CSE 2012
MCQ (Single Correct Answer)
+1
-0.3
Register renaming is done in pipelined processors
Paper analysis
Total Questions
Algorithms
4
Compiler Design
1
Computer Networks
6
Computer Organization
5
Data Structures
3
Database Management System
7
Digital Logic
1
Discrete Mathematics
12
Operating Systems
5
Programming Languages
4
Theory of Computation
3
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