Consider a $$6$$-stage instruction pipeline, where all stages are perfectly balanced. Assume that there is no cycle-time overhead of pipelining. When an application is executing on this $$6$$-stage pipeline, the speedup achieved with respect to non-pipelined execution if $$25$$% of the instructions incur $$2$$ pipeline stall cycles is________________.

A machine has a $$32$$-bit architecture, with $$1$$-word long instructions. It has $$64$$ registers, each of which is $$32$$ bits long. It needs to support $$45$$ instructions, which have an immediate operand in addition to two register operands. Assuming that the immediate operand is an unsigned integer, the maximum value of the immediate operand is ____________.

Consider two processors ܲ$${P_1}$$ and $${P_2}$$ executing the same instruction set. Assume that under identical conditions, for the same input, a program running on $${P_2}$$ takes $$25$$% less time but incurs $$20$$% more $$CPI$$ (clock cycles per instruction) as compared to the program running on ܲ$${P_1}$$ If the clock frequency of ܲ$${P_1}$$ is $$1GHz,$$ then the clock frequency of $${P_2}$$ (in $$GHz$$) is _____________.

Consider the following C functions in which size is the number of elements in the array E:

int MyX(int *E, unsigned int size){
 int Y = 0;
 int Z;
 int i,j,k;
 for(i = 0; i < size; i++)
       Y = Y + E[i];
 for(i = 0; i < size; i++)
   for(j = i; j < size; j++){
     Z = 0;
     for(k = i; k <= j; k++)
        Z = Z + E[k];
     if(Z > Y)
        Y = X;
   }
   return Y;
}

The value returned by the function MyX is the