A CPU generally handles an interrupt by executing an interrupt service routine

In the following process state transition diagram for a uniprocessor system, assume that there are always some processes in the ready state:

Now consider the following statements:
$$1.\,\,\,$$ If a process makes a transition $$D,$$ it would result in another process making transition $$A$$ immediately.
$$2.\,\,\,$$ $$A$$ process $${P_2}$$ in blocked state can make transition $$E$$ while another process $${P_1}$$ is in running state.
$$3.\,\,\,$$ The $$OS$$ uses preemptive scheduling.
$$4.\,\,\,$$ The $$OS$$ uses non-preemptive scheduling. Which of the above statements are TRUE?

The enter_CS() and leave_CS() functions to implement critical section of a process are realized using test-and-set instruction as follows:

void enter_CS(X) { 
   while test-and-set(X) ; 
} 

void leave_CS(X) { 
  X=0; 
}

In the above solution, X is a memory location associated with the CS and is initialized to 0. Now consider the following statements:

I. The above solution to CS problem is deadlock-free
II. The solution is starvation free.
III. The processes enter CS in FIFO order.
IV More than one process can enter CS at the same time.

Which of the above statements is TRUE?

The coupling between different modules of a software is categorized as follows
$${\rm I}.\,\,\,\,\,\,\,\,\,\,\,$$ Content coupling
$${\rm II}.\,\,\,\,\,\,\,\,\,$$ Common coupling
$${\rm III}.\,\,\,\,\,\,\,$$ Control coupling
$${\rm IV}.\,\,\,\,\,\,\,$$ Stamp coupling
$${\rm V}.\,\,\,\,\,\,\,\,\,$$ Data coupling
Coupling between modules can be ranked in the order of strongest (least desirable) to weakest (most desirable) as follows.