1
GATE CSE 2009
MCQ (Single Correct Answer)
+1
-0.3
A CPU generally handles an interrupt by executing an interrupt service routine
A
As soon as an interrupt is raised
B
By checking the interrupt register at the end of fetch cycle.
C
By checking the interrupt register after finishing the execution of the current instruction.
D
By checking the interrupt register at fixed time intervals.
2
GATE CSE 2009
MCQ (Single Correct Answer)
+2
-0.6
In the following process state transition diagram for a uniprocessor system, assume that there are always some processes in the ready state: GATE CSE 2009 Operating Systems - Process Concepts and Cpu Scheduling Question 18 English

Now consider the following statements:
$$1.\,\,\,$$ If a process makes a transition $$D,$$ it would result in another process making transition $$A$$ immediately.
$$2.\,\,\,$$ $$A$$ process $${P_2}$$ in blocked state can make transition $$E$$ while another process $${P_1}$$ is in running state.
$$3.\,\,\,$$ The $$OS$$ uses preemptive scheduling.
$$4.\,\,\,$$ The $$OS$$ uses non-preemptive scheduling. Which of the above statements are TRUE?

A
$$1$$ and $$2$$
B
$$1$$ and $$3$$
C
$$2$$ and $$3$$
D
$$2$$ and $$4$$
3
GATE CSE 2009
MCQ (Single Correct Answer)
+2
-0.6
The enter_CS() and leave_CS() functions to implement critical section of a process are realized using test-and-set instruction as follows:
void enter_CS(X) { 
   while test-and-set(X) ; 
} 

void leave_CS(X) { 
  X=0; 
}
In the above solution, X is a memory location associated with the CS and is initialized to 0. Now consider the following statements:

I. The above solution to CS problem is deadlock-free
II. The solution is starvation free.
III. The processes enter CS in FIFO order.
IV More than one process can enter CS at the same time.

Which of the above statements is TRUE?
A
I only
B
I and II
C
II and III
D
IV only
4
GATE CSE 2009
MCQ (Single Correct Answer)
+1
-0.3
In which one of the following page replacement policies, Belady’s anomaly may occur?
A
FIFO
B
Optimal
C
LRU
D
MRU
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