1
GATE CSE 2021 Set 2
Numerical
+1
-0
Consider a set-associative cache of size 2 KB (1 KB = 210 bytes) with cache block size of 64 bytes. Assume that the cache is byte-addressable and a 32-bit address is used for accessing the cache. If the width of the tag field is 22 bits, the associativity of the cache is _______
Your input ____
2
GATE CSE 2021 Set 2
MCQ (Single Correct Answer)
+1
-0.33

Which one of the following circuits implements the Boolean function given below?

f(x, y,z) = m0 + m1 + m3 +m4 + m5 + m6, where mi is the ith minterm.

A
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 5 English Option 1
B
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 5 English Option 2
C
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 5 English Option 3
D
GATE CSE 2021 Set 2 Digital Logic - Combinational Circuits Question 5 English Option 4
3
GATE CSE 2021 Set 2
MCQ (Single Correct Answer)
+1
-0.33

Let G be a connected undirected weighted graph. Consider the following two statements.

S1: There exists a minimum weight edge in G which is present in every minimum spanning tree of G.

S2: If every edge in G has distinct weight, then G has a unique minimum spanning tree. Which one of the following options is correct?

A
S1 is false and S2 is true.
B
S1 is true and S2 is false.
C
Both S1 and S2 are true.
D
Both S1 and S2 are false.
4
GATE CSE 2021 Set 2
MCQ (Single Correct Answer)
+1
-0.33

Consider the following ANSI C program:

int main() {

Integer x;

return 0;

}

Which one of the following phases in a seven-phase C compiler will throw an error?  

A
Syntax analyzer
B
Semantic analyzer
C
Machine dependent optimizer
D
Lexical analyzer
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