The value of a float type variable is represented using the single-precision $$32$$-bit floating point format of $$IEEE-754$$ standard that uses $$1$$ bit for sign, $$8$$ bits for biased exponent and $$23$$ bits for mantissa. $$A$$ float type variable $$X$$ is assigned the decimal value of $$−14.25.$$ The representation of $$X$$ in hexadecimal notation is

A $$4$$-way set-associative cache memory unit with a capacity of $$16KB$$ is built using a block size of $$8$$ words. The word length is $$32$$ bits. The size of the physical address space is $$4$$ $$GB.$$ The number of bit for the TAG field is ____________.

In designing a computer’s cache system, the cache block (or cache line) size is an important parameter. Which one of the following statements is correct in this context?

If the associativity of a processor cache is doubled while keeping the capacity and block size unchanged, which one of the following is guaranteed to be NOT affected?