A partial data path of a processor is given in the figure, where $R A, R B$, and $R Z$ are 32-bit registers. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?

Consider a memory system with 1 M bytes of main memory and 16 K bytes of cache memory. Assume that the processor generates 20-bit memory address, and the cache block size is 16 bytes. If the cache uses direct mapping, how many bits will be required to store all the tag values?

[Assume memory is byte addressable, $1 \mathrm{~K}=2^{10}$, $1 \mathrm{M}=2^{20}$]

A processor has 64 general-purpose registers and 50 distinct instruction types. An instruction is encoded in 32-bits. What is the maximum number of bits that can be used to store the immediate operand for the given instruction?

$$\mathrm{ADD ~ R1,~\#25 \qquad // R1 = R1 + 25}$$

A disk of size 512 M bytes is divided into blocks of 64 K bytes. A file is stored in the disk using linked allocation. In linked allocation, each data block reserves 4 bytes to store the pointer to the next data block. The link part of the last data block contains a NULL pointer (also of 4 bytes). Suppose a file of 1 M bytes needs to be stored in the disk. Assume, $1 \mathrm{~K}=2^{10}$ and $1 \mathrm{M}=2^{20}$. The amount of space in bytes that will be wasted due to internal fragmentation is ________ . (Answer in integer)