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## Marks 1

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Which one of the following circuits implements the Boolean function given below? f(x, y,z) = m0 + m1 + m3 +m4 + m5 + m6...
GATE CSE 2021 Set 2
If there are m input lines and n output lines for a decoder that is used to uniquely address a byte addressable 1 KB RAM...
GATE CSE 2020
A multiplexer is placed between a group of 32 registers and an accumulator to regulate data movement such that at any gi...
GATE CSE 2020
In the following truth table \$\$V=1\$\$ if and only if the input is valid. What function does the truth table represent?...
GATE CSE 2013
The Boolean expression for the output \$\$f\$\$ of the multiplexer shown below is ...
GATE CSE 2010
How many \$\$3\$\$ to \$\$8\$\$ decodes with an enable input are needed to construct to constant \$\$6\$\$ to \$\$64\$\$ line decoder wi...
GATE CSE 2007

## Marks 2

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Consider the two cascaded \$\$2\$\$-to-\$\$1\$\$ multiplexers as shown in the figure. The minimal sum of products form of the ...
GATE CSE 2016 Set 1
Consider the \$\$4\$\$-to-\$\$1\$\$ multiplexer with two select lines \$\${S_1}\$\$ and \$\${S_0}\$\$ given below The minimal sum-of-p...
GATE CSE 2014 Set 1
Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of \$\$n\$\$ variable...
GATE CSE 2007
Consider the circuit above. Which one of the following options correctly represents \$\$f(x,y,z)?\$\$ ...
GATE CSE 2006
Consider the \$\$ALU\$\$ shown below If the operands are in \$\$2's\$\$ complement representation, which of the following oper...
GATE CSE 2003
Consider the following multiplexer where \$\$10, 11, 12, 13\$\$ are four data input lines selected by two address line combi...
GATE CSE 2002
Consider the circuit shown below. The output of a \$\$2:1\$\$ Mux is given by the function \$\$(ac+bc)\$\$ Which of the follow...
GATE CSE 2001
Consider the circuit in fig shown \$\$f\$\$ implements ...
GATE CSE 1996
Consider the circuit in Fig. Which has a four bit binary number \$\${b_3}\,{b_2}\,{b_1}\,{b_0}\,\$\$ as input and a five bit...
GATE CSE 1996
Fill in the blanks: In the two bit full-adder/sub tractor unit shown in Fig., when the switch is in position \$\$2.\$\$ \$\$...
GATE CSE 1990

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