1

### GATE CSE 1990

Two $NAND$ gates having open collector outputs are tied together as shown in fig. The logic function $Y,$ implemented by the circuit is.
A
$Y = A\overline {BC} + \overline {DE}$
B
$Y = ABC + DE$
C
$Y = \overline {ABC} .\overline {DE}$
D
$Y = ABC\,.\,DE$
2
Fill in the Blanks

### GATE CSE 1990

Fill in the blanks:
In the two bit full-adder/sub tractor unit shown in Fig., when the switch is in position $2.$ $.....$ using $.....$ arithmetic.

$B$ is substracted from $A,$
$2's$ complement
3

### GATE CSE 1990

For the synchronous counter shown in fig. write the truth table of ${Q_0},\,\,{Q_1}$ and ${Q_2}$ after each pulse starting from ${Q_0} = {Q_1} = {Q_2} = 0$ and determine the counting sequenced also the modulus of the counter

What is the modules of the counter with initial state ${Q_2}\,{Q_1}\,{Q_0} = 000$

A
$3$
B
$4$
C
$5$
D
$6$
4

### GATE CSE 1990

Indicate which of the following well-formed formula are valid:
A
$\left( {\left( {{\rm P} \Rightarrow Q} \right) \wedge \left( {Q \Rightarrow R} \right)} \right) \Rightarrow \left( {{\rm P} \Rightarrow R} \right).$
B
$\left( {{\rm P} \Rightarrow Q} \right) \Rightarrow \left( { \sim P \Rightarrow \sim Q} \right)$
C
$\left( {{\rm P}\, \wedge \,\left( { \sim {\rm P}\,\,V \sim Q} \right)} \right) \Rightarrow Q\left( { \sim {\rm P} \Rightarrow \sim Q} \right)$
D
$\left( {\left( {{\rm P} \Rightarrow R} \right) \vee \left( {Q \Rightarrow R} \right)} \right) \Rightarrow \left( {\left( {\left( {{\rm P} \vee Q} \right) \Rightarrow R} \right)} \right)$

### Paper Analysis of GATE CSE 1990

Subject NameTotal Questions
Algorithms3
Compiler Design2
Computer Organization2
Digital Logic6
Discrete Mathematics2
Operating Systems10
Programming Languages2
Theory of Computation9

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