1
GATE EE 2016 Set 1
MCQ (Single Correct Answer)
+2
-0.6
A $$2$$-bit flash Analog to Digital Converter $$(ADC)$$ is given below. The input is $$0 \le {V_N} \le 3$$ Volts. The expression for the $$LSB$$ of the output $${B_0}$$ as Boolean function of $${X_2},\,{X_1}$$ and $${X_0}$$ is GATE EE 2016 Set 1 Digital Electronics - Analog to Digital and Digital to Analog Converter Question 2 English
A
$${X_0}\left[ {\overline {{X_2} \oplus {X_1}} } \right]$$
B
$$\overline {{X_0}} \left[ {\overline {{X_2} \oplus {X_1}} } \right]$$
C
$${X_0}\left[ {{X_2} \oplus {X_1}} \right]$$
D
$$\overline {{X_0}} \left[ {{X_2} \oplus {X_1}} \right]$$
2
GATE EE 2015 Set 1
MCQ (Single Correct Answer)
+2
-0.6
An $$8$$-bit, unipolar Successive Approximation Register type $$ADC$$ is used to convert $$3.5$$ $$V$$ to digital equivalent output. The reference voltage is $$+5 V.$$ The output of the $$ADC,$$ at the end of $$3$$rd clock pulse after the start of conversion, is
A
$$1010$$ $$0000$$
B
$$1000$$ $$0000$$
C
$$0000$$ $$0001$$
D
$$0000$$ $$0011$$
3
GATE EE 2006
MCQ (Single Correct Answer)
+2
-0.6
A student has made a-$$3$$ bit binary down counter and connected to the $$R$$-$$2R$$ ladder type $$DAC$$ [Gain $$=$$ $$\left( { - 1k\Omega /2R} \right)$$ as shown in figure to generate a staircase waveform.

The output achieved is different as shown in figure. What could be the possible cause of this error?

GATE EE 2006 Digital Electronics - Analog to Digital and Digital to Analog Converter Question 1 English 1 GATE EE 2006 Digital Electronics - Analog to Digital and Digital to Analog Converter Question 1 English 2
A
The resistance values are incorrect
B
The counter is not working property
C
The connection from the counter to $$DAC$$ is not proper
D
The $$R$$ and $$2R$$ resistances are interchanged
4
GATE EE 2005
MCQ (Single Correct Answer)
+2
-0.6
A digital-to-analog converter with a full -scale output voltage of $$3.5$$ $$V$$ has a resolution close to $$14$$ $$m$$ $$V.$$ Its bit size is
A
$$4$$
B
$$8$$
C
$$16$$
D
$$32$$
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