Consider the CMOS circuit shown in the figure (substrates are connected to their respective sources). The gate width (W) to gate length (L) ratios $$\left( {{W \over L}} \right)$$ of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the pMOSFET, the threshold voltage is $$-$$1 V and the mobility of holes is $$40{{c{m^2}} \over {V.s}}$$. For the nMOSFET, the threshold voltage is 1 V and the mobility of electrons is $$300{{c{m^2}} \over {V.s}}$$. The steady state output voltage V₀ is ___________.

The ideal long channel nMOSFET and pMOSFET devices shown in the circuits have threshold voltages of 1 V and $$-$$1 V, respectively. The MOSFET substrates are connected to their respectively sources. Ignore leakage currents and assume that the capacitors are initially discharged. For the applied voltages as shown, the steady state voltages are ____________.

Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10 $$\mu$$m and width 100 $$\mu$$m. The product of electron mobility ($$\mu$$_n) and oxide capacitance per unit area (C_ox) is $$\mu$$_nC_ox = 1 mA/V². The threshold voltage of the transistor is 1 V. For a gate-to-source voltage V_GS = [2 $$-$$ sin(2t)] V and drain-to source voltage V_DS = 1 V (substrate connected to the source), the maximum value of the drain-to-source current is ___________.

Consider the circuit shown with an ideal long channel nMOSFET (enhancement mode, substrate is connected to the source). The transistor is appropriately biased in the saturation region with V_GG and V_DD such that it acts as a linear amplifier. v_i is the small-signal ac input voltage. v_A and v_B represent the small-signal voltages at the nodes A and B, respectively. The value of $${{{v_A}} \over {{v_B}}}$$ is __________ (rounded off to one decimal place).